1. Field of the Invention
The present invention relates to a method of fabricating a metallic compound thin film and a semiconductor device including the metallic compound thin film and a method of fabricating the same.
2. Description of the Related Art
Conventionally, a silicon oxide film, characterized by excellent leak current characteristics and low interface state density, has been used as a gate insulator of a MOSFET. There is a problem, however, that, as the thickness of the gate insulator is decreased in a transistor having a gate insulator formed of a silicon oxide film, as a result of reduction in device size, the gate leak current resulting from a tunnel current is increased. As the gate leak current is increased, a substantial leak current is produced at turn-off, resulting in an abnormal operation of the semiconductor device or an increase in power consumption. Some study has been made in recent years of using a high-K gate dielectric material such as metal oxide to form a gate insulator.
A high-K dielectric metal oxide film is easily turned into a multicrystal. Therefore, diffusion of impurities and increase in a leak current easily occur across a grain boundary. As a result, impurities or metallic atoms doped in the gate electrode penetrate the high-K gate dielectric material to reach the channel region, thereby impairing the characteristics and reliability of the device.
Atomic layer deposition (ALD) is known as a promising method for forming a high-K gate dielectric material of a transistor. One problem with ALD is that materials used in the ALD method may remain the high-K gate dielectric material as impurities and also induce defects of the film. Another problem is that the stoichiometric mixture ratio of the film constituting the high-K gate dielectric material deviates from the designed value so that desired film characteristics cannot be obtained. A description will be given of these phenomena by referring to FIGS. 10A and 10B. FIGS. 10A and 10B are schematic diagrams showing a layer structure resulting when a high-K gate dielectric material is formed by the ALD method. FIG. 10A shows a state prior to a treatment for improvement of the film quality by thermal annealing and FIG. 10B shows a state after the treatment. As shown in FIG. 10A, prior to the thermal annealing, impurities are distributed evenly in the high-K gate dielectric material. After the annealing, impurities are generally removed from the film. Also, the film is turned into a closely-packed state. However, due to insufficient removal, impurities remain in the lower part of the high-K gate dielectric material, especially in the neighborhood of the substrate. The impurities that remain and the crystallization of the film give rise to degradation of the device that includes the high-K gate dielectric material. For example, an increase in a leak current or a variation in threshold characteristics is caused.
Patent document No. 1 describes a construction in which nitrogen is introduced into a high-K gate dielectric of a MIS transistor. More specifically, it describes a method of heating a high-K gate dielectric material in an ammonia atmosphere and forming a diffusion barrier layer on top of the film. The document also describes a method of localizing, by segregation, nitrogen at the interface between the high-K gate dielectric material and the silicon nitride film, by forming a silicon nitride film on top of the high-K gate dielectric material and subjecting the film to a thermal treatment (paragraphs 0043 and 0046). By employing such a method, impurities and metallic atoms are prevented from being diffused away from the gate electrode.
Related Art List
(1) Japanese Laid-Open Patent Application No. 2002-299607
However, the method described in the document is directed to the localizing of nitrogen in the upper part of the film and does not add any valid knowledge directed to a method of increasing the percentage content of nitrogen. Further, the benefit of restricting penetration of elements such as boron in the gate electrode is limited. Moreover, no solution is provided to the problem, described by referring to FIGS. 10A and 10B, of degradation in the transistor due to the crystallization of high-K gate dielectric material and the impurities that remain.